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Continuum Computer Architecture for Nano-scale and Ultra-high Clock Rate Technologies

Posted by cacrweb
January 20, 2005
Tags: high-performance computing

In: International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, January 17-19, 2005, Oahu, Hawaii. [CaltechCACR:2005.101]

Thomas Sterling and Maciej Brodowicz

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Continuum Computer Architecture for Nano-scale and Ultra-high Clock Rate Technologies