Applications Architecture Power Puzzle – SC09 Panel
Click names for presentation PDF.
Moderator:
- Mark Stalzer, CACR
Panelists:
- Thomas Sterling, Louisiana State University
- Allan Snavely, San Diego Supercomputer Center
- Stephen Poole, Oak Ridge National Laboratory
- William Camp, Intel Corporation
Abstract:
Over the next few years there are two boundary conditions that should constrain computer systems architecture: commodity components and applications performance. Yet, these two seem strangely disconnected. Perhaps we need some human optimization, as opposed to repeated use of Moore’s Law. Our panelists have been given a set of standard components that are on announced vendor roadmaps. They also each get to make one mystery component of no more complexity than a commercially available FPGA. The applications are HPL for linear algebra, Map-Reduce for databases, and a sequence matching algorithm for biology. The panelists have 10 minutes to disclose their systems architecture and mystery component, and estimate performance for the three applications at 1MW of power.