CACR Research Publications » Posts for tag 'parallel processing'

Reusable and Extensible High Level Data Distributions

In: Workshop on Patterns in High Performance Computing, 4-6 May, 2005, University of Illinois at Urbana-Champaign.

Roxana E. Diaconescu, Bradford Chamberlain and Hans P. Zima (2005)

(PDF)

Macroservers: An Execution Model for DRAM Processor-In-Memory Arrays

Technical Report. California Institute of Technology. [CaltechCACR:CACR-2000-182]

Hans P. Zima and Thomas L. Sterling

(PDF)